CodingBox Documentation

QSFP family hardware specs (SFF-8436, SFF-8665…)

The four-lane QSFP family has the most fragmented documentation of any form factor: the SFF Committee split module, connector, cage, electrical and rate-class "solution" documents apart, and issued 28 Gb/s variants of the mechanical parts when QSFP28 arrived. This page puts them back together.

The original MSA

INF-8438 — QSFP Transceiver (1.0). The founding four-lane agreement: outline, 38-pin connector, low-speed signals and the first management memory layout.

The QSFP+ core document

SFF-8436 — QSFP+ 4X 10 Gb/s Pluggable Transceiver (4.9). For years this single document carried QSFP+ electrical, mechanical and management definitions. The management part was later moved out into SFF-8636; SFF-8436 remains the reference for the QSFP+ hardware baseline.

Electrical

DocumentWhat it defines
SFF-8679 — QSFP+ 4X Hardware and Electrical Specification (1.8)the common electrical interface for QSFP+ and QSFP28 hosts and modules

Mechanical — QSFP+ (10 Gb/s per lane)

DocumentPart
SFF-8661 — QSFP+ 4X Module (2.5)module outline
SFF-8682 — QSFP+ 4X Connector (1.1)host connector
SFF-8683 — QSFP+ Cage (1.3)host cage

Mechanical — 28 Gb/s per lane (QSFP28)

DocumentPart
SFF-8662 — 28 Gb/s Connector, Style A (2.9)connector qualified for 25/28G lanes
SFF-8672 — 28 Gb/s Connector (1.2)alternative 28G connector definition
SFF-8663 — 28 Gb/s Cage, Style A (1.7)cage for 28G

The 28 Gb/s parts keep the QSFP+ outline, which is why QSFP+ modules fit QSFP28 (and later) ports.

"Transceiver solution" documents by rate

DocumentClassPer laneTotal
SFF-8635 (0.6)QSFP1010G40G
SFF-8685 (0.6)QSFP1414G~56G (InfiniBand FDR)
SFF-8665 (1.9)QSFP2825/28G100G

QSFP56 (4×50G PAM4) and QSFP112 (4×100G PAM4) extend this outline with IEEE 802.3 electrical interfaces and their own MSA revisions — see QSFP56 and QSFP112.

Double density

INF-8628 — QSFP-DD 8X Transceiver (QSFP Double Density) (0.0). The eight-lane extension: a second contact row, backward-compatible cage, higher power classes. Managed by CMIS. See QSFP-DD.

Management

  • SFF-8636 — paged management for QSFP+/QSFP28 (details).
  • SFF-TA-1004 — tunable QSFP+/QSFP28 memory map (details).
  • CMIS — QSFP-DD and CMIS-capable QSFP (details).

Why it matters for coding

Per-lane fields in SFF-8636 (Tx disable, Rx power, LOS, rate select) map onto the four electrical lanes defined by SFF-8679; power-class and CDR-present bits must match the hardware the module actually has. When editing a QSFP module in the EEPROM editor, keep identity consistent with the physical generation (10G vs 28G parts) or the host will refuse it.

Source

  • sfptotal.ru — List of MSA standards and specifications; SNIA SFF library